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本文提出了一种紧凑型DC至108GHz堆叠SOI分布式功率放大器，采用多驱动级间耦合技术，实现了1.525THz增益带宽积、20.8dBm峰值P1dB，并支持超过100Gb/s的64-QAM和PAM-4调制，解决了分布式放大器在增益、输出功率与带宽、芯片面积之间的权衡问题。
Achieving 1.525THz GBW, 20.8dBm Peak P1dB, and Over 100Gb/s in 64-QAM and PAM-4 Modulation Omar El-Aassar, Gabriel M. Rebeiz University of California, San Diego, La Jolla, CA Distributed amplifiers (DAs) are important circuit blocks for wireline optical links, high-resolution imaging systems, and millimeter-wave instrumentation. A clear trade-off exits in DAs between the gain and output power from one side and the bandwidth and chip area from the other. In this work, we propose a compact 23dB-gain CMOS distributed power amplifier (DPA) that operates from DC to 108GHz using several techniques to alleviate the output power-bandwidth tradeoff. The DPA exploits the complementary nature of NMOS-PMOS to minimize AM-AM and AM-PM distortion and achieves over 100Gb/s in both 64-QAM and PAM4 modulation. The proposed CMOS DPA consists of three cascaded sections (Fig. 4.7.1-top). An input 3-stage NMOS DA with supply-fed termination drives an intermediate
PA/Driver Using Multi-Drive Inter-Stack Coupling,