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ISSCC 2021Session 13 · CYRO-CMOS FOR QUANTUM COMPUTINGQuantum & Photonics40nm CMOS

A 1GS/s 6-to-8b 0.5mW/Qubit Cryo-CMOS SAR ADC for Quantum Computing in 40nm CMOS

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📋 论文概要

本文提出一种用于量子计算的低温CMOS SAR ADC,在40nm CMOS工艺下实现1GS/s采样率和6-8位可配置分辨率,每量子位功耗仅0.5mW。该ADC解决了大规模量子计算系统中室温电子学连接线过多的瓶颈,通过低温集成实现低功耗高速读取。

💡 主要创新点

核心指标
1GS/s 6-to-8b 0.5mW/Qubit
工艺节点
40nm CMOS
重要性
发表年份
ISSCC 2021

🏷 关键词

低温CMOSSAR ADC量子计算低功耗高速ADC

📄 原文摘要

Italy 4 EPFL, Neuchatel, Switzerland 1 2 Quantum computers (QCs) promise significant speedup for relevant computational problems that are intractable by classical computers. QCs process information stored in quantum bits (qubits) that must be typically cooled down to cryogenic temperatures. Since state-of-the-art QCs employ only a few qubits, those qubits can be driven and read out by room-temperature electronics connected to the cryogenic qubits by only a few wires. However, practical QCs will require more than thousands of qubits, making this approach impractical due to system complexity and reliability concerns. Although frequency multiplexing would reduce the interconnects to room temperature by fitting many qubit channels in the same physical interconnect, an excessive number of

👥 作者与机构

Gerd Kiene1,2, Alessandro Catania3, Ramon Overwater1,2, Paolo Bruschi3,

Edoardo Charbon1,2,4, Masoud Babaie1,2, Fabio Sebastiano1,2 Delft University of Technology, Delft, The Netherlands QuTech, Delft, The Netherlands 3 University of Pisa, Pisa,

分类:Quantum & Photonics · 年份:ISSCC 2021