A 4.8GS/s 7-ENoB Time-Interleaved SAR ADC with Dither-Based Background Timing-Skew Calibration and Bit-Distribution-Based Background Ping-Pong Comparator Offset Calibration

📋 论文概要

该论文提出了一种4.8GS/s、7-ENoB的时间交织SAR ADC，采用基于dither的背景时序歪斜校准方法，解决了传统校准方法对输入信号类型有限制的问题。通过bit-distribution-based技术进一步提升了性能。

💡 主要创新点

• 提出基于dither的背景时序歪斜校准方法，适用于所有类型的输入信号，无需依赖高频或大振幅等条件。
• 采用bit-distribution-based技术优化ADC性能，实现4.8GS/s高速采样下7-ENoB的有效位数。

🏷 关键词

📄 原文摘要

High-speed (>GS/s) medium-resolution (6-8b) ADCs are in high demand for wideband applications. The time-interleaved (TI) SAR ADC is widely used for its superior power efficiency. However, TI ADCs suffer from timing-skew mismatches that severely limit the performance. Some background timing-skew calibration methods rely on input derivative or input statistics such as autocorrelation [1] to detect timing-skew errors. These methods place limitations on the input signal, e.g., must be at high frequency, with large amplitude, have frequent zero crossings, etc. To be applicable to all types of input signals, some prior works inject a reference clock signal to sense the timing-skew errors [2-3]. Reference [2] injects the reference clock with slow rising edges to each interleaved channel. The timing-skew errors are detected by the difference of the injected voltages among channels. Nonetheless, it suffers from mismatches among different dither

👥 作者与机构

Yunsong Tao, Mingyang Gu, Baoyong Chi, Yi Zhong, Lu Jie, Nan Sun

Tsinghua University, Beijing, China