⚡ 本页包含 AI 生成的分析内容，仅供参考
本文提出了一种在22nm工艺中实现的电容耦合斩波仪表放大器，通过输入提升的第一级来改善功率噪声折衷，实现了0.69/0.58的功率效率因子和1.6nW/24nW的超低功耗。该设计面向物联网等功耗受限应用中高精度前端放大需求。
Information Technology of Peking University, Hangzhou, China *Equally Credited Authors (ECAs) 1 2 The front-end amplifier typically determines the noise level of a sensor system. Therefore, a highly power-efficient amplifier plays a critical role in Internet-of-Things (IoT) applications with stringent power constraints and small input amplitude [1,2]. Due to the physical limitation between transconductance and current consumption, there exists a severe power-noise trade-off. Several approaches have been proposed to address this issue. Inverter-stacking topologies in [3] concentrate on boosting the current efficiency gm/Id, achieving high noise-efficiency factors (NEF) through current-reuse techniques. However, the increased supply voltages result in worsened power-efficiency factors
Xinhang Xu*1, Siyuan Ye*1, Yaohui Luan1, Jihang Gao1, Jie Li1, Jiajia Cui1,
Hao Zhang2, Ru Huang1, Linxiao Shen1, Le Ye1,3 Peking University, Beijing, China Nano Core Chip Electronic Technology, Hangzhou, China 3 Advanced Institute of