A 1.2V High-Voltage-Tolerant Bootstrapped Analog Sampler in 12-bit SAR ADC Using 3nm GAA’s 0.7V Thin-Gate-Oxide Transistor

📋 论文概要

本文提出了一种在3nm GAA工艺中使用0.7V薄栅氧晶体管实现的耐高压自举模拟采样器，解决了该工艺缺乏厚栅氧晶体管而无法直接采样1.2V输入的问题，应用于12-bit SAR ADC。

💡 主要创新点

• 采用自举技术使得0.7V薄栅氧晶体管能够耐受1.2V输入电压，突破工艺限制。
• 在3nm GAA纳米片工艺中首次实现高电压容忍的模拟采样器，适用于低电压先进工艺下的通用ADC应用。

🏷 关键词

📄 原文摘要

process utilizing the Multi-Bridge-Channel-FET (MBCFET) with nanosheet technology enhances performance, power efficiency, and area (PPA) benefits by large effective channel width and enhanced design flexibility compared to the previous FinFET technology [1]. However, the 3nm GAA process provides only thin-gate oxide transistors for a 0.7V low supply voltage and does not offer thick-gate oxide transistors for higher supply voltages. Typically, a general-purpose analog-to-digital converter (ADC) needs to sample inputs at higher levels, such as 1.2V, over the 0.7V low supply voltage (VDD) in the 3nm GAA process. However, a conventional bootstrapped sampler can sample inputs only up to VDD level, using 2×VDD internal node voltages. In the previous FinFET

👥 作者与机构

Sangheon Lee, Jinwoo Park, Junsang Park, Sangkyu Lee, Jungho Lee,

Youngjae Cho, Michael Choi, Jongshin Shin Samsung Electronics, Hwaseong, Korea Recently, as process refinement continues, the latest 3nm Gate-All-Around (GAA)