A 10b Display Driver IC with a Pivoting Translinear-Loop DAC-in-Buffer Enabling 1μs 1-H Scan Time and 1722μm2 per Channel

📋 论文概要

本文提出了一款用于高分辨率OLED的10位显示驱动芯片，采用创新的枢转跨导线性环DAC-in-buffer结构，通过浮空电压镜像解耦粗/细域，实现了面积、速度和线性度之间的权衡优化。该芯片在180nm CMOS工艺下制造，实现了1μs的1-H扫描时间和1722μm2/通道的紧凑面积。

💡 主要创新点

• 提出枢转跨导线性环（PTL）DAC-in-buffer架构，克服了面积、速度和线性度的权衡限制。
• 引入浮空电压镜像（FVM）技术，解耦粗/细域，实现基于真DC插值的5b+5b架构，在保持高线性度的同时节省面积。

🏷 关键词

📄 原文摘要

Abstract This paper presents a 10b display driver IC (DDI) for high-resolution OLEDs. It features a novel pivoting translinear-loop (PTL) DAC-in-buffer that overcomes the area, speed, and linearity trade-offs. A key enabler is a floating voltage-mirror (FVM) that decouples coarse/fine domains, allowing an area-efficient 5b+5b architecture via true-DC interpolation while maintaining high linearity. Fabricated in 180nm CMOS, the DDI achieves a fast 1-H scan time of 1μs and a compact 1722μm2/channel. As mobile OLED displays push toward ever-higher spatial resolutions, the display driver IC (DDI) must accommodate a growing number of sourcing channels, forcing extremely tight area budgets. To meet these constraints, most high-density DDIs adopt the two-stage digital-to-analog converter (DAC) architecture (Fig. 24.5.1, top-left). In each channel, an M-bit decoder selects two adjacent tap voltages, VH and VL, from a globally shared resistorstring (R-string) that provides 2M levels between VRE

👥 作者与机构

Hyeong-Joon Kim, Yousung Park, Kihyun Kim, Seunghwa Shin, Hyun-Sik Kim

KAIST, Daejeon, Korea