机构

Fujitsu Laboratories

2 篇 ISSCC 论文

ISSCC 2010 Session 21 Data Converters
A 10b 50MS/s 820µW SAR ADC with On-Chip Digital Calibration
Masato Yoshioka, Kiyoshi Ishikawa, Takeshi Takayama, Sanroku Tsukamoto
power efficient ADCs. SAR ADC power scales with CMOS technology because it does not need operational amplifiers, which are getting difficult to design in deeply scaled CMOS. Recent published SAR ADCs have no static curre
ISSCC 2008 Session 31 RF & Wireless
60 and 77GHz Power Amplifiers in Standard 90nm CMOS
Toshihide Suzuki, Yoichi Kawano, Masaru Sato, Tatsuya Hirose, Kazukiyo Joshin
frequency mm-wave applications such as short-range communications (60GHz band) [1, 2] and automotive radar (77GHz band) [3]. The power amplifier (PA) is one of the most challenging blocks in the transmitter due to the lo