Paul Gronowski2 — ISSCC 知识库

ISSCC 2011 Session 4 Digital Processors

A 32nm 3.1 Billion Transistor 12-Wide-Issue Itanium® Processor for Mission-Critical Servers

Reid J. Riedlinger1, Rohit Bhatia1, Larry Biro2, Bill Bowhill2, Eric Fetzer1,

named Poulson, has eight multi-threaded 64 bit cores. Poulson is socket compatible with the current Intel® Itanium® Processor 9300 series (Tukwila) [1]. The new design integrates a ring-based system interface derived fro

Paul Gronowski2, Tom Grutkowski1 1 Intel, Fort Collins, CO, Intel, Hud

ISSCC 2008 Session 4 Digital Processors

A 65nm 2-Billion-Transistor Quad-Core Itanium® Processor

Blaine Stackhouse1, Brian Cherkauer1, Mike Gowan,

The processor has 4 dual-threaded cores integrated on die with a system interface and 30MB of cache in an 8M 65nm process. The 21.5×32.5mm2 die contains 2.05 billion transistors (Fig. 4.6.1). The silicon is designed to o

Paul Gronowski2, Chris Lyles1 1 Intel, Fort Collins, CO, 2Intel, Hudso