⚡ 本页包含 AI 生成的分析内容，仅供参考
该论文提出了一种用于GSM/EDGE的SiP集成方案，将RF收发器与基带通过片上串行接口连接，避免了片外互连，降低了功耗和PCB辐射。接收机采用零中频架构，集成了高动态范围的连续时间ΔΣ ADC，实现了90dB动态范围。
Braam Greyling4, Salvatore Piccolella5 The RF transceiver (Fig. 10.6.2) is connected via an on-chip serial interface to the BB part avoiding the need of any off-chip interconnection between BB and RF. This on-chip connection leads to power-consumption reduction and eliminates PCB radiation issues. The receiver is based on a zero-IF architecture with a 2ndorder anti-aliasing filter and a 4th-order 3b continuous-time ΔΣ ADC. The ADC achieves 90dB of dynamic range at 240kHz bandwidth which is sufficient to cope with the critical N+2 adjacentchannel interferer. A source-follower feedback-stage LNA (Fig.10.6.3) is used with approximately 150Ω input impedance and 1.2dB noise figure. In order to achieve a very low susceptibility against crosstalk and noise at supply and ground lines a fully differential coil-less circuit topology is used. 10.6 1 Infineon Technologies, Duisburg, Germany Infineon Technologies, Sophia-Antipolis, France
Giuseppe Li Puma1, Ernst Kristan1, Paolo De Nicola2, Cyril Vannier3,