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这篇论文提出了一种用于无源光网络（PON）的突发模式时钟数据恢复（BMCDR）电路，支持20/10/5/2.5Gb/s多速率。通过使用GVCO/Div2/DFF三模单元实现功率缩放，解决了传统多频带GVCO电路在低数据率时仍消耗固定高功耗的问题。
PON is one of the promising solutions for the last-mile communication systems. In PONs, the fast-locked CDR circuit must lock within tens of bit times once the data packets arrive. The socalled burst-mode CDR (BMCDR) circuits [1-5] with gated VCOs (GVCOs) have been presented. To meet the requirements of different PON standards, a multi-band BMCDR circuit is very desirable. The conventional multi-band technique [5] is realized by a GVCO with dividers. Since the GVCO has to operate at the highest speed, it dissipates a fixed power, even though only a low data rate is required. Furthermore, the dividers introduce extra time delays to reduce the sampling margin that may become an issue for high data rates. In this work, a 20/10/5/2.5Gb/s powerscaling BMCDR circuit is implemented in 90nm CMOS technology. It is aimed to scale the power of a BMCDR circuit for different data rates. To realize a power-scaling multi-band
Che-Fu Liang, Shen-Iuan Liu
National Taiwan University, Taipei, Taiwan