⚡ 本页包含 AI 生成的分析内容，仅供参考
本文提出了一种用于短距离并行光链路的收发器，总吞吐量达到96Gb/s。通过采用8条电源线和8条地线以及通道交错排列，有效降低了电源和衬底串扰对灵敏度的影响。
Bert Vermeire1, Hugh J. Barnaby1, Greg Fetzer2, Rick Vercillo2, Sayfe Kiaei1 Arizona State University, Tempe, AZ, 2Arete Associates, Tucson, AZ local decoupling capacitors are placed within every channel. If adjacent channels share the same power lines, substrate and electrical crosstalk can interfere constructively, which severely degrades sensitivity. Therefore, 8 power and 8 ground lines (8 pads on each side of the chip) are used for the array. Finally, channels sharing the same supply and ground lines are interleaved. 1 To overcome the data-throughput limitations of copper in processor-memory interfaces and massively parallel computing clusters without data latency overhead, direct optical bus links that support the full data/address bus width (32b/64b) while allowing a high total throughput are required. For a highly parallel link to be feasible in a dense digital system, inter-channel pitch for all
Sushmit Goswami1, Tino Copani1, Anuj Jain1, Habib Karaki1,