A 65nm Single-Chip Application and Dual-Mode Baseband Processor with Partial Clock Activation and IP-MMU 1 1 1 1

📋 论文概要

该论文提出了一款65nm单芯片应用与双模基带处理器，通过部分时钟激活和IP-MMU技术，解决了在单一芯片上集成应用处理器和双模基带处理器时的高功耗和性能瓶颈问题，适用于高级操作系统下的多媒体和通信应用。

💡 主要创新点

• 采用部分时钟激活技术，根据任务需求动态控制时钟，降低功耗。
• 集成IP-MMU（内存管理单元），实现高效的内存保护和虚拟化，支持多任务操作系统。
• 在65nm工艺上实现单芯片集成应用处理器和双模基带处理器，减少芯片面积和系统成本。

🏷 关键词

📄 原文摘要

Kenichi Nitta1, Takao Koike1, Shinichi Yoshioka1, Koji Ohno1, Masahito Saigusa2, Minoru Sakata3, Yukio Kodama4, Yuji Arai5, Teruyoshi Komuro6 1 Renesas Technology, Tokyo, Japan, 2NTT DoCoMo, Tokyo, Japan Fujitsu, Kanagawa, Japan, 4Mitsubishi Electric, Hyogo, Japan 5 Sharp, Hiroshima, Japan 6 Sony Ericsson Mobile Communications, Tokyo, Japan 3 Presently, cellular phones are used not only for voice communications or SMS, but also for video telephony, 3D Java gaming and high-end business applications. Adoption of a High-LevelOperating System, such as SymbianOS or Linux in cellular phones is popular. A high-performance application processor serves as the host in such cellular phone systems and accompanies the baseband processor as a modem sub-system. Single-chip integration of an application processor and a baseband processor provides a good costperformance balance. Our 1st generation of a one-chip integration of

👥 作者与机构

Masao Naruse , Tatsuya Kamei , Toshihiro Hattori , Takahiro Irita ,