A 170GB/s 16Mb Embedded DRAM with Data-Bus Charge-Recycling

📋 论文概要

该论文提出一种16Mb嵌入式DRAM，通过数据总线电荷回收技术实现170GB/s带宽。交替预充电时序使一个数据线放电的电荷转移到另一数据线充电，从而降低50%的功耗，解决了高带宽下数据总线功耗过大的问题。

💡 主要创新点

• 采用电荷回收技术，将DR线放电的电荷转移到GDR线，降低50%数据总线功耗。
• 提出交替预充电时序（DR线预充至VEQ2，GDR线预充至VEQ1），实现电荷循环利用。

🏷 关键词

📄 原文摘要

Mike Mound1, G.W. Jones1, Tim Egging1, Tomofumi Arakawa2, Katsuhiko Sasahara2, Kazuo Taniguchi2, Masayuki Miyabayashi2 United Memories, Colorado Springs, CO Sony Corporation, Tokyo, Japan driven to VCC and one of the GDR lines is driven to 0V. In the next half-cycle the DR lines are precharged to VEQ2 and the GDR lines are precharged to VEQ1. This timing is repeated for the entire data burst. With this alternating precharge timing and Ceq the charge used to drive a DR line low is transferred to a GDR line to drive it high. Charge recycling reduces the DR and GDR line power consumption by 50%. 1 2 Embedded DRAM is well suited for integrated graphics applications that require extremely high bandwidth and large amounts of memory. High per-pin data rate, very wide I/O, and concurrent read/write together provide a high total data rate. The highest previous total data rate for a 16Mb macro reported at this conference is 92GB/s [1]. This work demonstrates a 16Mb DRAM macro

👥 作者与机构

Kim Hardee1, Michael Parris1, O. Fred Jones1, Doug Butler1,