⚡ 本页包含 AI 生成的分析内容,仅供参考
该论文提出了一种用于图形应用的833MHz伪双端口嵌入式DRAM,通过伪双端口架构实现了读写操作的并发执行,从而显著提高了内存带宽。解决了传统嵌入式DRAM在高带宽图形应用中带宽不足的问题。
Atsushi Suzuki1, Tomohisa Takai1, Naoko Itoga1, Takayuki Miyazaki1, Takayuki Iwai1, Hiroyuki Takenaka2, Takehiko Hojo1, Shinji Miyano1, Nobuaki Otsuka1 1 Toshiba, Kawasaki, Japan, 2Toshiba Microelectronics, Kawasaki, Japan Embedded DRAMs have superior features for applications that require very high memory bandwidth, such as graphics and multimedia. To achieve high memory bandwidth, various techniques such as widening input/output pins [1], shrinking the unit array size [2], and performing a read operation and a write operation concurrently [3,4] have been reported. However, these embedded DRAM macros incur considerable area penalty to obtain high memory bandwidth. Figure 14.4.1 shows the cell efficiency versus the memory bandwidth of the macros reported recently. Among the techniques for achieving high bandwidth, the concurrent read/write operation is a very effective method in performing a
Mariko Kaku1, Hitoshi Iwai1, Takeshi Nagai1, Masaharu Wada1,