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本文提出一种在90nm数字CMOS工艺中实现单电感双频VCO的多频前端，面积仅0.06mm²，工作频率5.6GHz。解决了多频段接收机中VCO占用面积大和相位噪声要求之间的矛盾。
applications. Expensive scaled CMOS processes are readily used as a technology enabler to provide adequate performance. The high implementation cost of circuits in such processes is justified by the added functionality of the circuits, however it also drives the desire for low-area solutions in standard digital CMOS. For example, low-area inductor-less LNAs [1] take advantage of the high ft of scaled CMOS. Unfortunately, stringent phase noise requirements make inductors unavoidable in VCOs. This leads to solutions with area-demanding multipleinductor synthesizers [2] or spur-hazardous multiply-and-divide sections [4] to cover the wide frequency range required for multistandard receivers. In this work, we demonstrate a low-area multi-standard direct downconversion receiver front-end that
J. Borremans1,2, S. Bronckers1,2, P. Wambacq1,2, M. Kuijk2, J. Craninckx1, 1
IMEC, Leuven, Belgium, 2Vrije Universiteit Brussel, Brussels, Belgium Software-defined multi-standard radios are emerging solutions for future mobile