Spurious -Tone Suppression Techniques Applied to a Wide-Bandwidth 2.4GHz Fractional-N PLL

📋 论文概要

该论文提出了一种抑制分数N锁相环中杂散音的技术，并将其应用于一款宽带2.4GHz分数N锁相环。解决了传统分数N锁相环中分数杂散较大（通常超过-60dBc）的问题。

💡 主要创新点

• 提出了一种有效的杂散音抑制技术，能够显著降低环路带宽内的分数杂散功率。
• 将抑制技术应用于宽带2.4GHz分数N锁相环，实现了宽带宽下的低杂散性能。

🏷 关键词

📄 原文摘要

University of California at San Diego, La Jolla CA NextWave Broadband, San Diego, CA A major problem with fractional-N PLLs is that their phase noise contains fractional spurs, i.e., spurious tones at multiples of fref times the fractional part of fout/fref, where fout and fref are the PLL output and reference frequencies, respectively. In prior fractionalN PLLs fractional spurs within the loop BW tend to be large, typically well above −60dBc [1-4]. Fractional spurs at higher frequencies are attenuated by the loop filter, so for any choice of fref and fout fractional spur power can be reduced by sufficiently reducing the loop BW. This is the conventional approach to fractional spur suppression once fref is chosen, but is often undesirable because it increases in-band phase noise, settling time, susceptibility to VCO pulling, and loop filter size. This paper describes a fractional-N PLL IC based on a new digital

👥 作者与机构

Kevin J. Wang1, Ashok Swaminathan2, Ian Galton1, 1