A Commercial Field-Programmable Dense eFUSE Array Memory with 99.999% Sense Yield for 45nm SOI CMOS

📋 论文概要

本文提出了一种商用现场可编程密集eFUSE阵列存储器，采用镍硅多晶硅eFUSE，在45nm SOI CMOS工艺下实现99.999%的感测良率，无需额外工艺步骤即可实现VLSI功能重构。该阵列结构相比传统嵌入式eFUSE面积每比特改善超过10倍。

💡 主要创新点

• 采用镍硅多晶硅eFUSE实现高可靠性编程，零工艺增加。
• 密集阵列结构使面积每比特改善超过10倍，适用于商用现场可编程应用。
• 实现99.999%的感测良率，确保高可靠性。

🏷 关键词

📄 原文摘要

Chandrasekharan, Kothandaraman2, Yan Zun Li2, Chris Paone1, Brian Reed1, Norman Robson2, John Safran2, David Schmitt1, Subramanian Iyer2 1 IBM, Rochester, MN IBM, East Fishkill, NY 2 A nickel silicide polysilicon eFUSE provides a reliable, highly resistive programmed fuse while enabling reconfiguration of the VLSI functional features in traditional eFUSE applications with zero addition to the manufacturing process. The eFUSE has a history of wide use in embedded systems [1,2]. In previous work, a 65nm macro employed an array structure which improved areaper-bit by >10× and reduced programming time by >90% [3] over the traditional design [4]. For 45nm and beyond, it is necessary to have a design that has a Vt-mismatch-immune sense scheme, provides a sufficient voltage window for field-programming, and has in-hardware testability features for commercial design. This paper describes a second-generation one-time programmable read-only

👥 作者与机构

Greg Uhlmann1, Tony Aipperspach1, Toshiaki Kirihata2,