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ISSCC 2008Session 22 · VARIATION COMPENSATION & MEASUREMENTOther65nm CMOS

An All-Digital On-Chip Process-Control Monitor for Process-Variability Measurements

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📋 论文概要

该论文提出了一种全数字片上工艺控制监视器(PCM),用于测量纳米工艺中的工艺变异性。该监视器在65nm CMOS工艺中实现,面积仅0.41mm²,替代了传统的模拟测量方法。

💡 主要创新点

工艺节点
65nm CMOS
重要性
发表年份
ISSCC 2008

🏷 关键词

工艺变异性全数字监视器片上测量65nm CMOS

📄 原文摘要

P. A. Semi, Santa Clara, CA Process variability has become a major challenge in nanometer technologies. The trend is driven by Moore’s law, low-power requirements (i.e., low VDD), and shrinking device geometries. Understanding process variability is therefore a key to designing successful low-power multi-million gate SoCs. An all-digital onchip process control-monitor (PCM) that measures process variability is described. It is implemented in a 65nm dual-oxide tripleVt bulk CMOS process and it measures 0.41mm2 [1]. Unlike traditional methods that measure standard device properties using analog or digital techniques [2,3], this PCM measures process variability in a way that is directly relevant to VLSI designers. Using simple statistics the measurements translate directly into electrical design rules. The monitor consists of 4 modules: 1) an array racer module to measure timing races caused by local mismatch, 2)

👥 作者与机构

Fabian Klass, Ashish Jain, Greg Hess, Brian Park

分类:Other · 年份:ISSCC 2008