⚡ 本页包含 AI 生成的分析内容,仅供参考
该论文介绍了一款采用43nm CMOS工艺制造的16Gb 4-MLC NAND闪存芯片,芯片面积为120mm²。通过4-MLC技术,在保持较小芯片面积的同时实现了高密度存储,解决了大容量NAND闪存芯片的制造难题。
Koji Hosono1, Masahiro Yoshihara1, Toru Miwa2, Yosuke Kato2, Alex Mak3, Siu Lung Chan3, Frank Tsai3, Raul Cernea3, Binh Le3, Eiichi Makino1, Takashi Taira1, Hiroyuki Otake1, Norifumi Kajimura1, Susumu Fujimura1, Yoshiaki Takeuchi1, Mikihiko Itoh1, Masanobu Shirakawa1,Dai Nakamura1, Yuya Suzuki1, Yuki Okukawa1, Masatsugu Kojima1, Kazuhide Yoneya1, Takamichi Arizono1, Toshiki Hisada1, Shinji Miyamoto1, Mitsuhiro Noguchi1, Toshitake Yaegashi1, Masaaki Higashitani3, Fumitoshi Ito2, Teruhiko Kamei2, Gertjan Hemink2, Tooru Maruyama1, Kazumi Ino1, Shigeo Ohshima1 1 Toshiba, Yokohama, Japan SanDisk, Yokohama, Japan 3 SanDisk, Milpitas, CA 2 NAND flash memory use in digital still cameras and cellular phones is driving demand for larger-capacity storage. Moreover, NAND flash has the potential to replace HDDs. To achieve larger capacity while maintaining low cost per bit, technical improvements in feature size and area reduction are essential. To meet the
Kazushige Kanda1, Masaru Koyanagi1, Toshio Yamamura1,