⚡ 本页包含 AI 生成的分析内容,仅供参考
该论文提出了一种基于注入锁定LC-DCO的转发时钟接收器,用于在45nm CMOS工艺中实现27Gb/s的数据传输,解决了高速并行链路中的时钟抖动和相位偏移问题。
James E. Jaussi1, Joseph Kennedy1, Bryan Casper1, David J. Allstot2, Randy Mooney1 Intel, Hillsboro, OR, 2University of Washington, Seattle, WA 1 With the rise in aggregate bandwidth of microprocessors, there is an ever-increasing demand for dense low-power parallel data links with higher data rates. Successful recovery of data in the presence of ISI and jitter crucially depends on low clock jitter and precise clock-phase deskew. This paper describes a method for both filtering and deskewing a link clock using a differential injection-locked LC-DCO and demonstrates a forwarded-clock data receiver using this technique operating at 27Gb/s. Forwarded-clock parallel I/Os, in which clock and data are sent on separate channels, benefit from tracking of low-frequency transmit jitter, but high-frequency jitter is amplified over lossy channels thereby degrading clockdata tracking [1]. DLLs are commonly used for clock-data deskew,
Frank O’Mahony1, Sudip Shekhar2, Mozhgan Mansuri1, Ganesh Balamurugan1,