A 2.6mW 370MHz–to-2.5GHz Open-Loop Quadrature Clock Generator

📋 论文概要

该论文提出了一种工作频率范围为370MHz至2.5GHz、功耗仅2.6mW的开环正交时钟生成器。它解决了传统闭环方法（如DLL/PLL）功耗高、面积大、锁定时间长的问题，同时避免了开环多相滤波器存在的I/Q增益失配和信号衰减。

💡 主要创新点

• 提出了一种新型开环正交时钟生成架构，实现了宽频率范围和低功耗。
• 通过电路设计优化，在无需闭环反馈的情况下实现了良好的I/Q匹配和低功耗性能。

🏷 关键词

📄 原文摘要

Sergey V. Rylov1, Daniel J. Friedman1 1 IBM T.J. Watson, Yorktown Heights, NY IBM, Austin, TX 2 Quadrature-phase clock generation is required for many applications in wireless and wireline communications. Traditional closedloop-based quadrature-generation methods using DLLs or PLLs require high power, large area and long lock-in time. Open-loop quadrature generators address many of the issues associated with closed-loop designs. The polyphase filter is a commonly used openloop approach [1]. This method has significant drawbacks, however, I/Q gain mismatch and signal attenuation can be severe, especially when such filters are cascaded to allow operation over a wide frequency range, and input signals should have sinusoidal waveforms to avoid phase error due to the presence of harmonic components. An alternative injection-lock-based open-loop quadrature generator has been reported in [2]. It combines RC-CR filter and

👥 作者与机构

Kyu-hyoun Kim1, Paul W. Coteus1, Daniel Dreps2, Seongwon Kim1,