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ISSCC 2008Session 27 · ΔΣ DATA CONVERTERSData Converters

An Inverter-Based Hybrid ΣΔ Modulator

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📋 论文概要

本文提出了一种基于反相器的混合ΣΔ调制器,利用数字电路在先进CMOS工艺下的小面积和低功耗优势,替代传统模拟调制器,以缓解模拟设计困难的问题。

💡 主要创新点

重要性
发表年份
ISSCC 2008

🏷 关键词

反相器混合ΣΔ调制器CMOS工艺缩放

📄 原文摘要

Feature-size scaling [1] of modern CMOS technologies dictated by Moore’s law enables integration of extensive digital signal processing at low power consumption and small area. As the area of digital functions scales with s2 and the fT is increasing with new technologies, the processing power of digital circuits per unit area is increasing. The area of analog functions however, does not scale. Instead, the new technologies bring lower supply and early voltages, which makes the analog design more difficult. This makes it attractive to replace analog functions by high-speed digital circuits where possible. The ΣΔ modulator presented in this paper exploits the advantages of new CMOS technologies by digitization on both architectural and circuit level. The target DR of the modulator is 77dB in 200kHz. A basic ΣΔ modulator loop consists of an Lth-order loop filter, a Bbit quantizer and a DAC. Sampled with OSR, the theoretical signal-to-quantization-noise ratio (SQNR) of the modulator can be

👥 作者与机构

Robert H.M. van Veldhoven, Robert Rutten, Lucien J. Breems

NXP Semiconductors, Eindhoven, Netherlands

分类:Data Converters · 年份:ISSCC 2008