A Continuous Time ΔΣ ADC for Voice Coding with 92dB DR in 45nm CMOS

📋 论文概要

该论文介绍了一种用于语音编码的连续时间ΔΣ ADC，在45nm CMOS工艺下实现了92dB动态范围。论文重点分析了45nm工艺中闪烁噪声、匹配和失调等模拟设计关键参数，并利用多比特连续时间ΔΣ ADC的电流舵DAC来分离器件非理想性。

💡 主要创新点

• 在45nm CMOS工艺中针对语音编码应用设计了连续时间ΔΣ ADC，实现了高动态范围。
• 深入分析了先进工艺中闪烁噪声、匹配和失调对模拟设计的影响，并通过多比特调制器架构有效分离这些非理想因素。

🏷 关键词

📄 原文摘要

accomplished at the cost of analog design features. The prediction of the ITRS roadmap [1] shows a dramatic increase of flicker noise in new technologies. On the other hand, the voltage supply is reduced to almost 1V. This paper wants to clarify the important design parameters of the 45nm process like matching, flicker noise, and offset from an analog designers’ point of view. In comparison to any other basic analog building blocks, a multibit CT ΔΣ ADC is uniquely well suited for separating all relevant device imperfections. Its current-steering DAC provides spectral information (harmonics) about dynamic MOS transistor mismatch. The SC quantizer reveals dynamic mismatch of capacitances. In addition to that, the optional chopped filter input stage

👥 作者与机构

Lukas Dörrer, Franz Kuttner, Andreas Santner, Claus Kropf,

Thomas Puaschitz, Thomas Hartig, Manfred Punzenberger Infineon Technologies, Villach, Austria In modern technologies, the impressive digital device performance is