Advanced Planar Bulk and Multigate CMOS Technology: Analog-Circuit Benchmarking up to mm-Wave Frequencies

📋 论文概要

该论文对先进平面体硅和多栅CMOS技术（如FinFET）进行了模拟电路基准测试，评估其在毫米波频段的性能。通过比较不同器件结构，为45nm以下CMOS工艺的模拟/射频设计提供了指导。

💡 主要创新点

• 系统比较了平面体硅与多栅FinFET在模拟/射频电路中的性能，覆盖至毫米波频段。
• 展示了FinFET在毫米波频段具有竞争力的模拟性能，为先进CMOS技术选择提供依据。

🏷 关键词

📄 原文摘要

V. De Heyn, S. Thijs, D. Linten, G. Van der Plas, B. Parvais, M. Dehan, S. Decoutere, C. Soens, N. Collaert, M. Jurczak IMEC, Heverlee, Belgium CMOS scaling beyond 45nm requires devices that deviate from the planar bulk transistor with a polysilicon gate and nitrided silicon dioxide (SiON) as gate dielectric. To downscale planar bulk devices, strain is used to boost mobility and new materials are introduced in the gate stack. Multigate devices such as fully-depleted SOI FinFETs (Fig. 29.4.1) are also candidates for downscaling beyond 45nm. Previously published functional FinFET-based analog circuits [1] report low-frequency circuits with gate lengths not below 250nm and a classical gate stack. In [2] a FinFET-based tunable ring oscillator is demonstrated using devices with longer source/drain extensions, yielding higher series resistances. Here, the first FinFET-based RF circuits are demonstrated. For planar bulk, high-speed and RF circuits are presented with non-classical gate stacks

👥 作者与机构

Piet Wambacq, A. Mercha, K. Scheir, B. Verbruggen, J. Borremans,