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该论文提出了一种在65nm体CMOS工艺中实现的8.5Gb/s高摆幅源串联端接(SST)发射机,通过结合1.0V薄氧化物预驱动级和1.5V厚氧化物输出级,解决了多标准I/O对更大垂直眼开度和更高直流电源电压的需求。
the advantage of providing a large range of termination voltages, making them particularly suitable for multi-standard I/Os [1, 2]. Many standards (e.g. [3]) however, call for larger vertical eye openings that require raising the dc supply voltage from the 1.0V limit for thinoxide devices in 65nm technology to 1.2 or 1.5V. These requirements are addressed in the proposed SST transmitter design by combining a thin-oxide pre-driver stage running at 1.0V followed by thick-oxide output stages operated at 1.5V. Key features of this design include the implementation of tri-statable output slices consisting of programmable binary-weighted pre-distortion slices to achieve a mutually independent adjustment of the impedance tuning and FIR-based transmitter equalization, the level shifter
Marcel Kossel, Christian Menolfi, Jonas Weiss, Peter Buchmann,
George von Bueren, Lucio Rodoni, Thomas Morf, Thomas Toifl, Martin Schmatz IBM Zurich Research Laboratory, Rüschlikon, Switzerland Source-series-terminated (SST) drivers offer