A 0.6-to-10GHz Receiver Front-End in 45nm CMOS

📋 论文概要

该论文设计了一款覆盖0.6-10GHz的宽带接收机前端，采用45nm CMOS工艺，旨在支持软件定义无线电的多频段多模式需求，解决了宽带接收中的线性度和噪声性能问题。

💡 主要创新点

• 实现了0.6-10GHz的超宽带频率覆盖，适用于多种无线标准如蜂窝、WLAN和WPAN。
• 采用45nm CMOS工艺，实现了与数字电路的高集成度，有利于软件定义无线电的片上集成。
• 在宽带范围内优化了线性度和噪声性能，满足多模接收需求。

🏷 关键词

📄 原文摘要

various standards including those for cellular, WLAN and WPAN applications. Software-defined radios (SDRs) are being considered as a likely platform to build tomorrow’s handsets. The receiver in such radios can be tuned over a wide range of frequencies and can support multiple modulation schemes. Consequently, broadband receivers with good linearity and noise performance over a wide band are needed [1-3]. The digital part of an SDR will dominate the silicon area, mandating the use of advanced CMOS technologies. The analog/RF circuitry is preferably integrated on the same die as the digital part. This paper describes a fully integrated broadband receiver front-end in 45nm baseline CMOS. A highly linear low-noise receiver covering a spectrum from below 1GHz (−3dB at 600MHz) up to 10GHz,

👥 作者与机构

R. van de Beek, J. Bergervoet, H. Kundur, D. Leenaerts, G. van der Weide

NXP Semiconductors, Eindhoven, Netherlands Wireless communication is evolving towards multi-standard terminals that handle