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本文设计了一款用于移动式脑电图(EEG)系统的8通道采集ASIC,采用0.5μm CMOS工艺,总功耗仅200μW。芯片集成了8个读出通道、11位ADC、方波振荡器和偏置电路,旨在实现低功耗、高集成度的便携式医疗诊断设备,提升患者舒适度并扩展应用场景。
U. Leuven, Leuven, Belgium A crucial and important part of a medical diagnostics system is the monitoring of the biopotential signals. This paper describes a complete low-power EEG acquisition ASIC that is suitable for miniaturized ambulatory EEG measurement systems. The aim is not only to improve the patients’ comfort but also to extend the device applications. Figure 8.2.1 shows the architecture of the EEG acquisition ASIC, which is implemented in a 0.5µm CMOS process. It consists of eight readout channels, an 11b ADC, a square-wave oscillator and a bias circuit. In addition to the acquisition mode, the ASIC has calibration and impedance measurement modes. The EEG signals are µV-range low-frequency signals that are correlated with a large amount of common-mode (CM) interference. Therefore, a low-noise and high-CMRR amplifier is necessary, for
Refet Firat Yazicioglu1,2, Patrick Merken1, Robert Puers2,
Chris Van Hoof1,2 1 IMEC, Leuven, Belgium, 2K