A 22.3dB Voltage Gain 6.1dB NF 60GHz LNA in 65nm CMOS with Differential Output

📋 论文概要

本文设计了一款60GHz低噪声放大器（LNA），采用65nm数字CMOS工艺，实现单端输入转差分输出。在59.3GHz频率下，达到22.3dB电压增益（19.3dB功率增益）和6.1dB噪声系数，适用于宽带高速无线通信系统。

💡 主要创新点

• 首次在65nm数字CMOS工艺中实现60GHz频段单端输入到差分输出的LNA，便于与数字基带集成。
• 通过优化电路拓扑和尺寸，在毫米波频段同时实现了高电压增益（22.3dB）和低噪声系数（6.1dB）。

🏷 关键词

📄 原文摘要

broadband high-data-rate wireless communication systems. Increasing digital signal processing in Gb/s communication systems using OFDM demands modern CMOS technologies with feature size of 65nm or less. It is desirable to use the same pure digital process for the analog front-end to facilitate SoC implementation for low-cost mass-market products. This paper describes a 60GHz LNA, implemented in a 65nm digital CMOS technology, that has a single-ended input and a differential output. At 59.3GHz, the LNA achieves a maximum voltage gain of 22.3dB (power gain of 19.3dB). The input matching is better than −10dB over the entire 3dB bandwidth from 55.8GHz to 63.5GHz. The LNA has a minimum measured NF of 6.1dB, an output compression point of +2.7dBm and draws 29mA from a 1.2V supply. A compact layout is realized by extensive use of on-chip

👥 作者与机构

Christopher Weyers, Pierre Mayr, Johannes W. Kunze, Ulrich Langmann

Ruhr-Universität Bochum, Bochum, Germany The 7GHz unlicensed frequency band at 60GHz is an attractive resource for