A 0.2-to-2.0GHz 65nm CMOS Receiver Without LNA Achieving >11dBm IIP3 and <6.5 dB NF

📋 论文概要

该论文提出了一种无LNA的65nm CMOS接收机架构，工作在0.2-2.0GHz频段，通过优化线性度和噪声性能实现了大于11dBm的IIP3和小于6.5dB的噪声系数，从而显著提升了接收机的无杂散动态范围(SFDR)。

💡 主要创新点

• 创新性地采用无LNA的接收机结构，避免了传统LNA带来的非线性失真，在低电压下实现了高线性度。
• 提出了一种宽带匹配技术，覆盖0.2-2.0GHz频率范围，同时保持低噪声和高IIP3性能。

🏷 关键词

📄 原文摘要

Spurious-free dynamic range (SFDR) is a key specification of radio receivers and spectrum analyzers, characterizing the maximum distance between signal and noise+distortion. SFDR is limited by the linearity (intercept point IIP3 mostly, sometimes IIP2) and the noise floor. As receivers already have low noise figure (NF) there is more room for improving the SFDR by increasing the linearity. As there is a strong relation between distortion and voltage swing, it is challenging to maintain or even improve linearity intercept points in future CMOS processes with lower supply voltages. Circuits can be linearized with feedback but loop gain at RF is limited [1]. Moreover, after LNA gain, mixer linearity becomes even tougher. If the amplification is postponed to IF, much more loop gain is available to linearize the amplifier. This paper proposes such an LNA-less mixer-first receiver. By careful analysis and optimization of a passive mixer core [2,3] for low conversion loss and low noise foldin

👥 作者与机构

M. C. M. Soer, E. A. M. Klumperink, Z. Ru, F. E. van Vliet, B. Nauta

University of Twente, Enschede, Netherlands