A Single-Chip Highly Linear 2.4GHz 30dBm Power Amplifier in 90nm CMOS

📋 论文概要

该论文提出了一种在90nm CMOS工艺中实现的高线性度2.4GHz 30dBm单芯片功率放大器。通过采用PMOS电容补偿技术来减小AM-PM失真，从而改善EVM性能。

💡 主要创新点

• 采用PMOS电容补偿技术，通过优化PMOS器件尺寸和偏置电压，有效抵消NMOS晶体管Cgs的非线性变化，将输出相位变化控制在5°以内。
• 在90nm CMOS工艺中实现了2.4GHz频段30dBm的高输出功率，同时保持了高线性度。

🏷 关键词

📄 原文摘要

Pankaj Goyal2, Yanjie Wang1, Ali M. Niknejad1 University of California, Berkeley, CA Intel, Hillsboro, OR In CMOS PAs, AM-PM distortion is also a major contributor to EVM. To reduce this, a PMOS-based capacitive compensation technique is used [5]. The sizes and bias voltages of the PMOS devices (P1/P2) are chosen to cancel the nonlinear variation in Cgs of the NMOS transistors. The variation in the output phase is within 5° up to the targeted average power for a large range of bias voltages (Fig. 22.3.3). 1 2 In recent years, there has been tremendous interest in trying to implement power amplifiers (PAs) in CMOS, due to cost and integration benefits. However, the low supply voltage, conductive substrate, and high loss of onchip passives make monolithic, linear, high-power PA design challenging in CMOS. Most of the high-power CMOS PAs reported to date are switching-type [1,2], and have not exhibited sufficient linearity required for modern wireless

👥 作者与机构

Debopriyo Chowdhury1, Christopher D. Hull2, Ofir B. Degani2,