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ISSCC 2009Session 27 · SRAM AND EMERGING MEMORYMemory

A 1.6GB/s DDR2 128Mb Chain FeRAM with Scalable Octal Bitline and Sensing Schemes

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📋 论文概要

该论文提出了一款128Mb链式铁电存储器(Chain FeRAM),采用可扩展的八位线(Octal Bitline)和传感方案,实现了1.6GB/s的DDR2接口速率,旨在替代传统DRAM。通过创新的位线和链式架构,解决了FeRAM在容量和速度上的局限性。

💡 主要创新点

核心指标
1.6GB/s DDR2 接口
重要性
发表年份
ISSCC 2009

🏷 关键词

FeRAM链式铁电存储器八位线DDR2传感方案

📄 原文摘要

Hoya, Tadashi Miyakawa, Ryu Ogiwara, Ryo Fukuda, Ryosuke Takizawa, Kosuke Hatsuda, Fumiyoshi Matsuoka, Yasushi Nagadomi, Daisuke Hashimoto, Hisaaki Nishimura, Takeshi Hioka, Sumiko Doumae, Shoichi Shimizu, Mitsumo Kawano, Toyoki Taguchi, Yohji Watanabe, Shuso Fujii, Tohru Ozaki, Hiroyuki Kanaya, Yoshinori Kumura, Yoshiro Shimojo, Yuki Yamada, Yoshihiro Minami, Susumu Shuto, Koji Yamakawa, Souichi Yamazaki, Iwao Kunishima, Takeshi Hamamoto, Akihiro Nitayama, Tohru Furuyama Toshiba, Yokohama, Japan An application that takes advantage of FeRAM characteristics is replacing current DRAM, which then becomes high-performance nonvolatile RAM cache. This improves system performance for many kinds of computer systems, including mobile PCs, cellular phones, digital video products, and storage systems such as SSDs. However, the highest capacity in nonvolatile RAMs that allow frequent cache reads and writes is limited to 64Mb [1,2]. The

👥 作者与机构

Hidehiro Shiga, Daisaburo Takashima, Shinichiro Shiratake, Katsuhiko

分类:Memory · 年份:ISSCC 2009