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本文展示了在65nm基线CMOS工艺中设计W波段(75-110GHz)放大器的可行性,实现了+10dBm的饱和输出功率和7.5dB的噪声系数。通过优化无源器件性能,克服了深亚微米CMOS在毫米波频率下的性能损失,证明了低成本CMOS技术可应用于100GHz电路。
The scaling of CMOS technology has led to development of amplifiers up to 100GHz and even beyond. As the technology enables the integration of many functions on silicon and is suitable for mass production, the cost-effective utilization of millimeter-wave frequencies becomes possible. Despite the possibilities, the millimeter-wave potential of deep submicron CMOS is easily lost in the poor performance of the passive components around the transistors. This paper demonstrates that 65nm-baseline 6-metal CMOS technology is suitable for designing 100GHz circuits having a competitive performance when compared to other published CMOS designs. Two amplifiers for W-band operation are presented. Both amplifiers, later referred to as the conventional and the slow-wave amplifier (SW-amplifier), are constructed of four cascaded common source (CS) stages, as shown in Fig. 29.2.1. CS-topology was adopted because it provides high gain, low noise
Dan Sandström, Mikko Varonen, Mikko Kärkkäinen, Kari Halonen
Helsinki University of Technology, Espoo, Finland