⚡ 本页包含 AI 生成的分析内容，仅供参考
该论文提出了一个工作在57-66GHz的紧凑型直接下变频前端，采用45nm数字CMOS工艺，实现了全数字控制、低功耗和低1/f噪声，适用于相控阵系统。
high-datarate communication [1-4]. From a cost perspective, a highly integrated solution is favorable. Speed and power consumption considerations for the highdata-rate digital part of the chip make 45nm CMOS a very realistic candidate technology for such systems. This work presents a 150×150µm2 60GHz low 1/f noise direct-downconversion front-end in 45nm low-power (LP) digital CMOS technology. Its low area, all-digital control (no external bias voltage has been used) and low power consumption make it highly suitable for phasedarray systems. Further, a sufficiently large bond pad and optional ESD protection make it practically applicable. Only standard technology features have been used (no MiM capacitors, no Aluminum top layer).
Jonathan Borremans1, Kuba Raczkowski1,2, Piet Wambacq1,3, 1
IMEC, Leuven, Belgium KU Leuven, Leuven, Belgium 3 Vrije Universiteit Brussel, Brussels, Belgium 2 Recently, 60GHz receiver front-ends have emerged, aiming for very