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ISSCC 2009Session 6 · CELLULAR AND TUNERRF & Wireless65nm CMOS

An Embedded 65nm CMOS Low-IF 48MHz-to-1GHz Dual Tuner for DOCSIS 3.0

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📋 论文概要

该论文提出了一款基于65nm CMOS工艺的嵌入式低中频双调谐器,覆盖48MHz至1GHz频率范围,用于支持DOCSIS 3.0标准的高数据速率传输。通过信道绑定技术,解决了传统有线电视网络带宽不足的问题。

💡 主要创新点

工艺节点
65nm CMOS
重要性
发表年份
ISSCC 2009

🏷 关键词

DOCSIS 3.0双调谐器低中频宽带接收机65nm CMOS

📄 原文摘要

L. Dauphinee, J. Xiao, D.S.-H. Chang, T.-H. Chih, M. Brandolini, D. Koh, B. J.-J. Hung, T. Wu, M. Introini, G. Cusmai, L. Tan, B. Currivan, L. He, P. Cangiane, P. Vorenkamp Broadcom, Irvine, CA The increased competition to deliver broadband data to the home (including GPON and VDSL) is motivating cable providers to deliver data rates which far exceed what is presently available based on the DOCSIS 1.x and DOCSIS 2.0 standards. The DOCSIS 3.0 standard provides this bandwidth increase as well as additional flexibility, where higher data throughput can be obtained by bonding together multiple downstream (DS) channels. This standard calls for the ability to bond any 4 channels in a 64MHz contiguous RF bandwidth. Solutions that allow even more channel bonding and provide more flexibility in the allocated frequency spectrum are preferred. This paper reports an embedded dual-tuner architecture able to select two independent 32MHz frequency bands, allowing for a maximum of 10 demodulated 6MHz

👥 作者与机构

F. Gatta, R. Gomez, Y. Shin, T. Hayashi, H. Zou, J.Y.C. Chang,

分类:RF & Wireless · 年份:ISSCC 2009