A 6Gb/s/pin Pseudo-Differential Signaling Using Common-Mode Noise Rejection Techniques Without Reference Signal for DRAM Interfaces

📋 论文概要

本文提出了一种用于DRAM接口的伪差分信号技术，通过共模噪声抑制方法无需参考信号，实现了6Gb/s/pin的数据传输速率。该技术解决了差分信号引脚数多和单端信号噪声大的问题，在保持高数据率的同时降低了I/O引脚成本。

💡 主要创新点

• 提出伪差分信号技术，无需参考信号，减少引脚数。
• 采用共模噪声抑制技术，提升信号完整性。
• 针对DRAM接口优化，平衡了数据率与成本。

📄 原文摘要

parallel links as well as in high-speed serial links. However, differential signaling is not cost effective for DRAM interfaces because the I/O-pin count is a significant portion of the chip cost. Since differential signaling requires 2n pins and channels to transmit n bits of data, the data rate must be doubled compared to single-ended signaling to accomplish the same per-pin data rate. However, ISI due to channel-bandwidth limits and technology limits degrade the performance [1]. Although single-ended signaling achieves a higher data rate per pin, two major problems limit increases of the data rate: reference ambiguity and power-supply fluctuation [2]. Several works are reported to solve the problems of single-ended signaling [3-7]. However, the skew between

👥 作者与机构

Kyung-Soo Ha1, Lee-Sup Kim1, Seung-Jun Bae2, Kwang-Il Park2,

Joo Sun Choi2, Young-Hyun Jun2, Kinam Kim2 KAIST, Daejeon, Korea Samsung Electronics, Hwasung, Korea 1 2 Differential signaling is effective in suppressing common-mode noise in