A 0.13µm CMOS 78dB SNDR 87mW 20MHz BW CT ∆Σ ADC with VCO-Based Integrator and Quantizer

📋 论文概要

该论文提出了一种基于VCO的连续时间ΔΣ ADC，利用环形振荡器作为积分器和量化器，实现了78dB SNDR、20MHz带宽和87mW功耗。通过使用D触发器对VCO输出进行多比特量化，解决了传统量化器的偏移和亚稳态问题，并保证了单调性。

💡 主要创新点

• 采用VCO作为积分器和量化器，利用环形振荡器的离散电平输出实现简单鲁棒的多比特量化。
• 量化器对D触发器电压偏移和亚稳态不敏感，具有保证的单调性。
• 在0.13µm CMOS工艺中实现了78dB SNDR和低功耗性能。

🏷 关键词

📄 原文摘要

based ADCs have become a topic of great interest due to the unique and attractive signal-processing properties they offer in the design of oversampling converters. Assuming a ring-oscillator structure, the outputs of a VCO toggle between two discrete levels (VDD and GND) like a CMOS digital gate, enabling simple multibit quantization using Dflip-flops. Since only one VCO output phase transitions at a given sampling instant while all others saturate to the positive/negative supply, quantization is robust to flip-flop voltage offsets and metastability, and has guaranteed monotonicity. Furthermore, the VCO behaves as a CT integrator in that its output phase is proportional to the time integral of the applied control voltage. As long as it oscillates, the VCO output phase accumulates endlessly, implying

👥 作者与机构

Matt Park1, Michael Perrott2, 1

Massachusetts Institute of Technology, Cambridge, MA SiTime, Sunnyvale, CA 2 Voltage-controlled oscillator (VCO)