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ISSCC 2010Session 13 · FREQUENCY & CLOCK SYNTHESISClocking & PLLs

A 0.3mm2 90-to-770MHz Fractional-N Synthesizer for a Digital TV Tuner

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📋 论文概要

本文提出了一款面积仅0.3mm²、频率范围90至770MHz的低杂散分数分频合成器,用于日本数字电视调谐器,解决了多频段覆盖和1/7MHz高频率分辨率的需求。

💡 主要创新点

核心指标
0.3mm²面积,90-770MHz频率范围
重要性
发表年份
ISSCC 2010

🏷 关键词

分数分频合成器数字电视调谐器低杂散

📄 原文摘要

Fujitsu Laboratories, Yokohama, Japan Fujitsu Laboratories, Kawasaki, Japan 2 This paper describes a 0.3mm2 and a 90M-to-770MHz range low spurious fractional-N synthesizer, with which mobile receivers for Japanese terrestrial digital broadcasting are equipped. The synthesizer for DTV tuner needs to cover 90Mto-108MHz which is scheduled for ISDB-Tsb, and 170M-to-222MHz which is scheduled for ISDB-Tmm etc, and 470M-to-770MHz for ISDB-T. And the synthesizer needs a frequency resolution of 1/7MHz to receive each segment. In addition, it is demanded that the synthesizer minimize the macro area to reduce costs while maintaining other performance (phase noise, power consumption, tracking time, etc.) from a previous work [1]. It’s known that a fractional-N PLL is effective to realize both a frequency resolution and small area because it can use a reference clock with higher frequency, which enables a higher loop bandwidth (BW) to be obtained, and the capacitance

👥 作者与机构

Masafumi Kondou1, Atsushi Matsuda2, Hiroshi Yamazaki1, Osamu Kobayashi2

分类:Clocking & PLLs · 年份:ISSCC 2010