⚡ 本页包含 AI 生成的分析内容，仅供参考
该论文提出了一种在90nm CMOS工艺下工作电压低至0.29V的嵌入式NAND-ROM，适用于超低电压应用如传感器网络和生物医学芯片。通过消除读1噪声和优化电路设计，实现了大容量存储的同时保持低待机电流和窄单元电流分布。
Hsinchu, Taiwan 3 Fukuoka Institute of Technology, Fukuoka, Japan 2 Many low-voltage chips such as sensor networks and biomedical applications need large-capacity low-VDDmin-delay-product embedded ROM for storing fixed programs and data [1]. NOR-ROMs provide low VDD and high speed for smallcapacity applications with a short bitline (BL) [2]. However, if read-1 noise can be eliminated, a NAND-ROM is superior [1] for large-capacity storage in standby-dominated low-voltage chips because of smaller area, narrower cell-current (ICELL) distribution, and lower standby current. Static NAND-ROM with short BL
Meng-Fan Chang1, Shu-Meng Yang1, Chih-Wei Liang1, Chih-Chyuang
Chiang1, Pi-Feng Chiu1, Ku-Feng Lin1, Yuan-Hua Chu2, Wen-Chin Wu2, Hiroyuki Yamauchi3 1 National Tsing Hua University, Hsinchu, Taiwan Industrial Technology Research Institute,