A 1.4V Signal Swing Hybrid CLS-Opamp/ZCBC Pipelined ADC Using a 300mV Output Swing Opamp

📋 论文概要

该论文提出了一种混合CLS-Opamp/ZCBC架构的流水线ADC，利用仅300mV输出摆幅的运算放大器实现了1.4V的信号摆幅，解决了CMOS工艺缩放中电压余量和本征增益降低带来的设计难题。

💡 主要创新点

• 创新性地将相关电平移位(CLS)技术与零交叉电路(ZCBC)混合，在低电压下获得大信号摆幅。
• 使用输出摆幅仅300mV的运算放大器，通过混合架构扩展至1.4V有效信号摆幅，降低了对高增益运放的依赖。

🏷 关键词

📄 原文摘要

Scaling in CMOS technologies has made the application of traditional opamp topologies increasingly difficult. In the face of decreasing voltage headroom and intrinsic device gain, designers have employed techniques such as gain-boosting, correlated double sampling , and correlated level-shifting (CLS) [1] to maximize output swing for a given gain specification. Zero-crossing based circuits (ZCBC) remove the opamp altogether and use a comparator and current sources

👥 作者与机构

Benjamin P Hershberg, Skyler T Weaver, Un-Ku Moon

Oregon State University, Corvallis, OR