A 512kb 8T SRAM Macro Operating Down to 0.57V with An AC-Coupled Sense Amplifier and Embedded Data-Retention-Voltage Sensor in 45nm SOI CMOS

📋 论文概要

该论文提出了一种512kb的8T SRAM宏单元，采用45nm SOI CMOS工艺，能够在低至0.57V的电压下工作。通过引入AC耦合感测放大器（ACSA）和嵌入式数据保持电压传感器，解决了宽电压范围内存储器设计的挑战，兼顾了面积效率和工艺变化。

💡 主要创新点

• 提出AC耦合感测放大器（ACSA），工作电压由最坏情况位线开/关电流比限制，实现极低电压操作。
• 采用面积高效的再生驱动技术，优化位线驱动性能。
• 集成嵌入式数据保持电压传感器，用于自适应调节，降低待机功耗。

🏷 关键词

📄 原文摘要

J. Watson, Yorktown Heights, NY There is a need for large embedded memory that operates over a wide range of supply voltage compatible with the limits of static CMOS logic that also minimizes standby power [1,2]. A 512kb 8T SRAM macro in 45nm SOI CMOS is developed as a building block for this application. It addresses the design challenges related to area efficiency and process variation with three contributions: 1) an AC coupled sense amplifier (ACSA) that operates at a power supply ultimately limited by the worst-case bit line on/off current ratio; 2) area efficient, regenerative driving of long data lines to permit bidirectional signaling on a single metal 4 wiring track on the memory cell column pitch; 3) a data retention voltage (DRV) sensor to determine the mismatch-limited minimum standby supply voltage without corrupting the contents of the memory.

👥 作者与机构

Masood Qazi1, Kevin Stawiasz2, Leland Chang2, Anantha Chandrakasan1, 1

Massachusetts Institute of Technology, Cambridge, MA 2 IBM T