An 8.5Gb/s CMOS OEIC with On-Chip Photodiode for Short-Distance Optical Communications

📋 论文概要

该论文提出了一种采用标准CMOS工艺的单芯片光电集成电路（OEIC），集成了片上硅光电二极管，用于短距离光通信。通过设计高速接收电路和均衡技术，克服了硅光电二极管响应速度慢的瓶颈，实现了8.5Gb/s的数据传输速率。

💡 主要创新点

• 在标准CMOS工艺中集成片上硅光电二极管，实现低成本单芯片OEIC。
• 采用均衡技术补偿硅光电二极管的慢响应特性，提升带宽至8.5Gb/s。
• 通过优化电路设计减少地弹和键合线耦合，提高信号完整性。

🏷 关键词

📄 原文摘要

Yonsei University, Seoul, Korea Ewha Womans University, Seoul, Korea 2 Recently, low-cost silicon optoelectronic integrated circuits (OEICs) have been drawing attention for applications in short-distance optical communications such as chip-to-chip and board-to-board interconnects, LAN, data storage networks, etc [1-4]. Particularly, single-chip OEICs with on-chip silicon photodiodes provide a number of advantages including low cost, reduced ground-bounce, and bond-wire-induced coupling. Nevertheless, the slow response of silicon photodiodes in a standard CMOS process serves as a major bottleneck for highspeed communication [1]. To improve the bandwidth of silicon photodiodes, either some process modification or avalanche photodiode implementation has been developed. However, the former results in increased costs, whereas the latter has reliability issues. Although a differential photodiode configuration was

👥 作者与机构

Dongmyung Lee1, Jungwon Han2, Eunsoo Chang1, Gunhee Han1, Sung Min Park2