Suppression of Flicker Noise Upconversion in a 65nm CMOS VCO in the 3.0-to-3.6GHz Band

📋 论文概要

本文提出了一种抑制CMOS VCO中闪烁噪声上变频的新技术，工作在3.0-3.6GHz频段，采用65nm CMOS工艺。该技术无需谐振网络即可在宽频率范围内有效抑制近端1/f³相位噪声，同时不影响振荡器启动裕度和白噪声相位噪声。

💡 主要创新点

• 提出了一种基于非谐振元件的闪烁噪声上变频抑制技术，适用于宽频率范围。
• 该技术不牺牲振荡器启动裕度，也不恶化白噪声相位噪声，相比传统方法具有优势。

🏷 关键词

📄 原文摘要

Flicker noise up-conversion into close-in 1/f3 phase noise is still one of the major issues in the design of CMOS oscillators. Suppression techniques have been recently presented suggesting (i) adoption of a resonant network [1], (ii) reduction of transistor size [2] or (iii) insertion of source degeneration [3]. However, resonant solutions do not guarantee suppression over a wide frequency range, while the other options affect the oscillator start-up margin and degrade the “white” 1/f2 phase noise. This work presents an alternative technique that does not rely on resonant elements and does not affect both start-up margin and 1/f2 phase noise. Demonstration of the technique is described in a 65nm CMOS VCO design. Technique rationale: Figure 2.7.1 shows an LC-tuned cross-coupled oscillator topology without tail current source. The circuit features minimum 1/f3 noise [4] and is therefore the best testbench for suppressing the up-conversion of FET 1/f

👥 作者与机构

Salvatore Levantino, Marco Zanuso, Carlo Samori, Andrea Lacaita

Politecnico di Milano, Milan, Italy