⚡ 本页包含 AI 生成的分析内容,仅供参考
该论文提出了一种全数字无SAW极性发射机,在65nm CMOS上实现了0.8mm²的芯片面积,用于EDGE SoC。它解决了传统发射机中SAW滤波器带来的成本和面积问题,通过全数字架构实现了低功耗和高集成度。
Khurram Waheed1, Mitch Entezari1, Gennady Feygin1, Sudheer Vemulapalli1, Vasile Zoicas1, Chih-Ming Hung1, Nathen Barton1, Imran Bashir1, Kenneth Maggio1, Michel Frechette1, Meng-Chang Lee1, John Wallberg1, Patrick Cruise1, Naveen Yanduru1 Texas Instruments, Dallas, TX Delft University of Technology, Delft, Netherlands 1 2 EDGE is currently the most widely used standard for data communications in mobile phones. Its proliferation has led to a need for low-cost 2.5G mobile solutions. The implementation of RF circuits in nanoscale digital CMOS with no or minimal process enhancements is one of the key obstacles limiting the complete SoC integration of cellular radio functionality with digital baseband. The key challenges for such RF integration include non-linearity of devices and circuits, device mismatches, process parameter spread, and the increasing potential for self-interference that could be induced by one function in the SoC onto another.
Jaimin Mehta1, R. B. Staszewski1,2, Oren Eliezer1, Sameh Rezeq1,