A 900MHz Direct ΔΣ Receiver in 65nm CMOS

📋 论文概要

该论文提出了一种工作在900MHz的直接ΔΣ接收机，采用65nm CMOS工艺设计，旨在解决LTE多带宽可扩展需求以及多无线电同时连接导致的强干扰环境问题。通过直接ΔΣ架构无需传统混频器，在片上实现高线性度与抗干扰能力。

💡 主要创新点

• 直接ΔΣ接收机架构省去传统下混频器，简化系统并降低功耗。
• 在65nm CMOS工艺中实现900MHz工作频率，支持LTE带宽动态缩放。
• 通过数字域处理提升对相邻信道和带外干扰的抑制能力。

🏷 关键词

📄 原文摘要

Nokia Research Center, currently with ST-Ericsson, Turku, Finland, Nokia Research Center, Otaniemi Lablet, Espoo, Finland 2 Wireless communications is moving towards higher data rates but also requiring dynamic scalability of signal bandwidths in LTE to allow more optimization opportunities at the network level. At the same time consumer devices are providing multiple active radio connections simultaneously, resulting in an extremely hostile interference environment due to intra-device coupling. Especially the trade-off between off-chip, passive out-of-band filtering and linearity remains a major challenge in highly optimized FDD systems like WCDMA [1] or LTE. Local RF loops have been proposed to remove the highest blockers [2] but still most of the commercial receivers e.g. [3] are adopting conventional direct-conversion or low-IF architectures. Various sampling techniques [4] including the bandpass

👥 作者与机构

Kimmo Koli1, Jarkko Jussila1, Pete Sivonen1, Sami Kallioinen2, Aarno Pärssinen2