A 23mW Fully Integrated GPS Receiver with Robust Interferer Rejection in 65nm CMOS

📋 论文概要

该论文实现了一款全集成的GPS接收机，在65nm CMOS工艺下功耗仅为23mW，通过电路设计技术有效抑制来自2G/3G发射机的强干扰，去除了传统的外部级间SAW滤波器，从而降低了系统成本和面积。

💡 主要创新点

• 提出了一种无需外部SAW滤波器的全集成GPS接收机架构，通过片上干扰抑制技术克服蜂窝频段泄漏信号的干扰。
• 采用低功耗设计方法，在65nm CMOS工艺下实现了23mW的功耗，同时保持了接收机对弱GPS信号的检测能力。

🏷 关键词

📄 原文摘要

are rapidly increasing in importance in our life. In particular, smart-phones with embedded GPS receivers are still growing their share and soon they will be the main products in the handset market. Co-existence of a GPS receiver together with cellular phones creates new challenges because leakage signals from the transmitters in 2G/3G systems are harmful interferers, making it difficult for the receiver to detect a weak GPS signal from satellites. In general, an external interstage SAW filter is used for rejecting blocking signals after the LNA. Recently, there have been attempts to remove the inter-stage SAW filter to minimize the number of external components required[1-3]. So, a single pre-select filter is only required to prevent the out-of-band signals from blocking the receiver

👥 作者与机构

Hyunwon Moon, Sangyoub Lee, Seung-Chan Heo, Hwayeal Yu,

Jinhyunck Yu, Ji-Soo Chang, Seung-Il Choi, Byeong-Ha Park Samsung Electronics, Yongin, Korea Many mobile devices with personal navigation and location based services (LBS)