A 45nm 37.3GOPS/W Heterogeneous Multi-Core SoC

📋 论文概要

提出了一款面向数字电视、IP网络及图像识别等应用的45nm异构多核SoC，实现了37.3 GOPS/W的高能效，解决了传统单核处理器在多媒体处理中的性能和功耗瓶颈。

💡 主要创新点

• 采用异构多核架构，集成多种处理器核以优化不同任务的执行效率。
• 在45nm工艺下实现每瓦37.3 GOPS的能效比，显著优于同期同类设计。
• 针对数字电视和IP网络应用进行定制化设计，支持图像识别和数据库搜索等复杂负载。

🏷 关键词

📄 原文摘要

Shigezumi Matsui1, Osamu Nishii1, Atsushi Hasegawa1, Makoto Ishikawa2, Tetsuya Yamada2, Junichi Miyakoshi2, Koichi Terada2, Tohru Nojiri2, Makoto Satoh2, Hiroyuki Mizuno2, Kunio Uchiyama2, Yasutaka Wada3, Keiji Kimura3, Hironori Kasahara3, Hideo Maejima4 1 Renesas Technology, Kodaira, Japan Hitachi, Kodaira, Japan 3 Waseda University, Shinjuku, Japan 4 Tokyo Institute of Technology, Yokohama, Japan 2 We develop a heterogeneous multi-core SoC for applications, such as digital TV systems with IP networks (IP-TV) including image recognition and database search. Figure 5.3.1 shows the chip features. This SoC is capable of decoding 1080i audio/video data using a part of SoC (one general-purpose CPU core, video processing unit called VPU5 and sound processing unit called SPU) [1]. Four dynamically reconfigurable processors called FE [2] are integrated and have a total theoretical performance of 41.5GOPS and power consumption of

👥 作者与机构

Yoichi Yuyama1, Masayuki Ito1, Yoshikazu Kiyoshige1, Yusuke Nitta1,