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ISSCC 2010Session 7 · DESIGNING IN EMERGING TECHNOLOGIESOther

Capacitively Coupled Non-Contact Probing Circuits for Membrane-Based Wafer-Level Simultaneous Testing

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📋 论文概要

本文提出了一种基于电容耦合的非接触探测电路,用于膜基晶圆级同时测试(WLST),解决了传统探针卡需要数十万根探针导致接触力过大的问题。通过非接触方式实现晶圆上所有芯片的同时测试和老化,降低了已知良好芯片(KGD)的获取成本。

💡 主要创新点

重要性
发表年份
ISSCC 2010

🏷 关键词

电容耦合非接触探测晶圆级同时测试膜基探针卡

📄 原文摘要

Hideki Kusamitsu1, Yoshio Komoto1, Kunihiko Iizuka1, Katsuyuki Ikeuchi2, Gil Su Kim2, Makoto Takamiya2, Takayasu Sakurai2 1 Association of Super-Advanced Electronics Technologies, Yokohama, Japan University of Tokyo, Tokyo, Japan 2 Wafer-level simultaneous testing (WLST) where all chips on a wafer are tested and burned in at the same time is preferable in reducing the cost of obtaining Known Good Dies (KGD’s). At present, however, it is difficult to realize the WLST because it requires a probe card with some hundred thousand needles, leading to more than a ton of force needed for stable contact of all needles. Non-contact probing has been proposed based on a chip-to-chip inductively-coupled interface [1] which can reduce the force but it needs a probing chip built specific to a certain product, which is costly. Recently, a low-cost membrane-based probing technique has been disclosed which makes use of the atmospheric pressure

👥 作者与机构

Mutsuo Daito1, Yoshiro Nakata1, Satoshi Sasaki1, Hiroyuki Gomyo1,

分类:Other · 年份:ISSCC 2010