A Microcontroller-Based PVT Control System For A 65nm 72Mb Synchronous SRAM

📋 论文概要

本文提出一种基于微控制器的PVT（工艺、电压、温度）控制系统，用于65nm工艺的72Mb同步SRAM。通过将芯片分为四个独立电源域（存储核心、外围逻辑、模拟电路和I/O），利用片上微控制器实时监测并调整各域供电，有效应对工艺变化带来的工作裕度、漏电和速度问题，提升SRAM的可靠性和良率。

💡 主要创新点

• 将微控制器集成到SRAM芯片中，实现对四个独立电源域的片上PVT自适应控制，无需外部干预。
• 通过分离并独立控制存储核心、外围逻辑、模拟电路和I/O的供电，精确补偿工艺、电压和温度波动，从而优化工作裕度并降低亚阈值漏电。

🏷 关键词

📄 原文摘要

Cypress Semiconductor, San Jose, CA As scaling of silicon CMOS technology continues more challenges emerge in dealing with process variations. In SRAMs process variations directly affect operating margin, subthreshold leakage and speed. Previous schemes were used to address operating margin problems using body bias [1] and adaptive cell biasing [2]. To address variation problems effectively, on-chip power supplies must be separated and individually controlled. In this case the SRAM chip has 4 independent power domains: memory core, periphery logic, analog circuits and I/O’s. This paper introduces a manufacturable scheme to control speed distribution while managing leakage current. A similar post silicon tuning technique was used [3] which utilizes body bias trimming to improve parametric yield, but it doesn’t address leakage control or speed improvement. The gate density at 65nm makes it possible to design a digital control system embedding

👥 作者与机构

Sherif T Eid, Morgan Whately, Sandeep Krishnegowda