⚡ 本页包含 AI 生成的分析内容，仅供参考
该论文提出了一种用于毫米波成像的183GHz CMOS再生接收机像素电路，通过低功耗设计解决了大型成像阵列中功耗随像素数量平方增长的问题。实现了13.5mW/像素的功耗，为构建大规模片上成像阵列提供了可行的像素方案。
Terahertz- and mm-Wave-based imagers have recently gained interest for imaging in security screening and bio-imaging applications [1,2]. For these applications to become practical, the core pixel circuits employed in an imaging array must meet challenging constraints that originate from the system level design and the needs of constructing large array structures on-chip. The most critical of these constraints is that the pixel must consume very low power, as an array will inflate the total power by n2, where n2 is the total number of pixels in a square (n x n) array. Pixel circuit area is the 2nd major constraint, as the single pixel area will be also inflated by n2. This area constraint is critical because the cost-effective pixel array should ideally fit on a wafer to facilitate monolithic fabrication and avoid the need for complicated mechanical assembly of multiple array sections. A third system-level constraint similar to that experienced in CMOS image sensor arrays is the challen
Adrian Tang, Mau-Chung Frank Chang
University of California, Los Angeles, CA