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ISSCC 2011Session 19 · LOW-POWER DIGITAL TECHNIQUESDigital Circuits

A 0.27V 30MHz 17.7nJ/transform 1024-pt Complex FFT Core with Super-Pipelining

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📋 论文概要

该论文提出了一种采用超级流水线技术的1024点复数FFT核心,在0.27V超低电压下工作,频率达30MHz,单次变换能耗仅17.7nJ,解决了低电压下因漏电增加导致能量效率退化的问题。

💡 主要创新点

核心指标
0.27V, 30MHz, 17.7nJ/transform (1024-point complex FFT)
重要性
发表年份
ISSCC 2011

🏷 关键词

低电压FFT超级流水线能量效率亚阈值

📄 原文摘要

University of Michigan, Ann Arbor, MI, 2Arizona State University, Tempe, AZ Recently, aggressive voltage scaling was shown as an important technique in achieving highly energy-efficient circuits. Specifically, scaling Vdd to near or subthreshold regions was proposed for energy-constrained sensor systems to enable long lifetime and small system volume [1][2][4]. However, energy efficiency degrades below a certain voltage, Vmin, due to rapidly increasing leakage energy consumption, setting a fundamental limit on the achievable energy efficiency. In addition, voltage scaling degrades performance and heightens delay variability due to large Id sensitivity to PVT variations in the ultra-low voltage (ULV) regime. This paper uses circuit and architectural methods to further reduce the minimum energy point, or Emin, and establish a new lower limit on energy efficiency, while simultaneously improving performance and robustness.

👥 作者与机构

Mingoo Seok1, Dongsuk Jeon1, Chaitali Chakrabarti2, David Blaauw1, Dennis Sylvester1

分类:Digital Circuits · 年份:ISSCC 2011